First report on Japan's semiconductor reinvestment is out!

Five measures of progress since Japan passed the Economic Security Promotion Act in 2022

Friends, back in summer 2025, I posted about a new project assessing Japan’s reinvestment in its semiconductor industry. My June 2025 post highlighted travel to Kumamoto, Kyushu, and Hokkaido, among other locations, during which I met with stakeholders from METI to TSMC Japan to RESONAC to Rapidus and universities such as Kumamoto University and Hokkaido University.

I kicked off the project in late 2024, roughly a year after then METI Minister Nishimura Yasutoshi came to the UC Berkeley campus in November 2023 during APEC Week in San Francisco.

The pull quote from that event - and indeed the one that sparked this project -

Semiconductor analyst Digits to Dollars had joined us, and offered a broad question on Japan’s semiconductor policy.

There was a delightful moment when the Minister acknowledged the sheer breadth of the question, paused for thought, and then made up his mind to expound on the topic. Which he then did for several minutes, on measures Japan and METI are taking to try and leap back up to the technology frontier in semiconductor fabrication through the Rapidus JV [Japan’s new pure-play logic foundry] ]in Chitose, Hokkaido.

Specifically, that moment catalyzed two research questions:

1) Could a nation that had fallen behind the technology frontier in semiconductor production return back to the frontier, through licensing, partnering, and industry creation?

2) If the move back to the technology frontier in semiconductor production, and the policy measures supporting it, are driven by an economic security strategy, what are the right measures to judge whether Japan has become more economically secure?

Since that June 2025 post - and visits to Kumamoto and Hokkaido, among other destinations (many visits to METI of course included) - I’ve also had the pleasure of visiting Sendai, to see Tohoku University, and AIST, one of Japan’s national labs, in Tsukuba. I also attended METI’s Economic Security Forum in December 2025, along with Semicon Japan. The Rapidus foundry team has also come to the UC Berkeley campus multiple times.

Many thanks to my various hosts and guests, and to the JETRO San Francisco team and the Consulate General of Japan in San Francisco for their support.

Readers might remember that in February of this year, UC Berkeley hosted the first Transpacific Collaboration Forum, to highlight semiconductor supply chain collaboration between Japan, Taiwan, and the United States.

---

This project will culminate in three reports.

1. Japan’s Economic Security Promotion Act, Four Years On: This first report focuses on Japan’s Economic Security and Promotion Act, passed in 2022, and subsequent policy measures. Specifically, the economic security framing of ESPA, and its scope and relative size as compared to Japan’s GDP and compared to other international stimulus packages such as the US CHIPS Act, also passed in 2022. Also, measures by which we can measure ESPA’s efficacy.

2. The Kumamoto semiconductor ecosystem: A second report is on the Kumamoto semiconductor ecosystem. Kumamoto prefecture, Kyushu, was the site of Japan’s first logic foundry in the 1960s and now is home to TSMC’s first production foundry in Japan, the JASM (Japan Advanced Semiconductor Manufacturing) fab or TSMC Fab 23. A second foundry (Fab 23 P2) is now under construction.

3. Returning to the technology frontier - the Rapidus foundry project: A third report, on the Rapidus foundry initiative and the potential impact of a new leading-edge logic foundry, is planned for publication in summer 2027.

👉👉The first report is now available for download from the Institute for Business Innovation (IBI) at Berkeley Haas (scroll down the publications page to Jon Metzler).

Thanks to the IBI team, the UC Berkeley Risk and Security Lab team, and the UC Berkeley Center for Japanese Studies for their support over the course of this project. It takes a village!

---

In the report (👈direct download link), I offer five ways to measure the efficacy of Japan’s reinvestment into its semiconductor industry:

Measuring the Economic Security Promotion Act

There are multiple ways to measure ESPA four years on. We offer the following as measures that can be applied longitudinally, to measure changes in them over time.

1. Japan’s global share by stage in semiconductor value chains

2. Semiconductor technologies on-shored and technology diffusion benefits

3. Wafer fabrication capacity and utilization

4. Job and business creation

We also add METI’s own goals: increased autonomy, and increased indispensability.

I also share the finding that Japan will invest roughly $103B in stimulus between 2021 and 2030. Big enough to be globally relevant (i.e., big enough to be compelling at a time when multiple countries have put together stimulus packages), and on a GDP-adjusted basis, big enough to really impact economies locally. Again, the aggregate number, at about $10B per year, is 2x the US CHIPS Act on an absolute basis and about 12X on a GDP-adjusted basis.

Getting back to the five measures listed above.

Wth regards to measure #1: Japan’s share of global semiconductor value chains — representatives of METI and Rapidus often utilize the chart below in presentations.. Rapidus, for example, referred to it during their booth presentation at Semicon Japan in December 2025. This blends logic and memory revenue together.

This sets a tone of crisis, which is the backdrop behind the abundant stimulus ($103B between 2021-2030, so 2x the US CHIPS Act on an absolute basis and about 12X on a GDP-adjusted basis) ESPA has set in motion.

But, a more detailed, disaggregated look at value chains shows Japanese companies retain high, sometimes dominant share in specific segments in the semiconductor value chain, such as Wafers, Fab Tools, and ATP Tools. The chart below comes from an excellent report from CSET in 2021.

On-shoring fabs like in the TSMC JASM case or new logic foundry creation as in the Rapidus case shows the policy goal of raising Japan’s share (and thus revenue, in the above METI chart) in the Fab segment of semiconductor value chains. Or, as I say in the report:

From an economic resiliency and autonomy perspective – and this has driven most government semiconductor packages, not just Japan’s – greater contribution at the fab stage is viewed as essential. In this view, a strong position in segments such as wafer materials and tools do not necessarily ensure access to chips if they are still made off-shore. And in fact, we have not heard Japan described as enjoying Silicon Shield-style protection or trade negotiation leverage due its strong positions in photoresist, non-conductive film, ABF, glass fiber, or silicon wafers.

I’ll be serializing excerpts from the report over multiple installments in this newsletter, with commentary. But, why wait when you can read the whole thing now! Looking forward to your feedback.

Many thanks to Digits to Dollars , Larry Greenwood and Jan-Peter (JP) Kleinhans for their review of various drafts of this first report, and to JP for taking time to discuss his wonderful report for OECD on the chip landscape. Many thanks also to Chris Miller for sharing his re-weighted version of the above CSET chart on country share of value add by segment, which he presented at Semicon Japan and which I reproduce with commentary in the paper.

As described I’ll be serializing excepts from the report in upcoming editions of this newsletter.

---

👉👉Interested in discussing the US-Japan trade and semiconductor partnership in person?

On Friday July 24, the Institute for Business Innovation at the Berkeley Haas School of Business and JETRO will co-host Wiring the Alliance: the US-Japan Trade and Semiconductor Partnership. This is an in-person only event at the Japan Innovation Campus in Palo Alto. Doors open at 5:10pm.

I’ll join William Chou from the Hudson Institute and Tsujiguchi Makoto from the Keidanren Policy Research Institute as panelists. Amb. Larry Greenwood, Senior Advisor, Bower Group Asia and former US Ambassador to APEC, will moderate.

I’ll share findings from my look back at Japan’s Economic Security Promotion Act (their version of our CHIPS Act), four years on. How to measure progress? Has Japan become more autonomous and more indispensable, to borrow METI’s turn of phrase?

We will also discuss projects announced so far in the US-Japan Trade and Investment Agreement, and collaboration opportunities highlighted through those projects.

👉👉 registration for our July 24 event is here. Hope to see you.

5:10 PM — Doors open

5:30 PM — Panel discussion & Q&A

7:00 PM — Networking reception (food & drinks provided)

8:00 PM — Close

Thanks to JETRO (the Japan External Trade Organization, under METI) for their partnership, and to our hosts, the Japan Innovation Campus, and our marketing partner, the Japan Society of Northern California.

See you there!

Jon